VU CS-302 Online Test Preparation

MCQ's Test For CS-302 Quiz Preparation Virtual University

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CS-302 Quiz Preparation Virtual University

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Question # 1

FIFO is an acronym for __________

Question # 2

Bi-stable devices remain in either of their _________ states unless the inputs force the device to switch its state

Question # 3

____________ is said to occur when multiple internal variables change due to change in one input variable.

Question # 4

A multiplexer with a register circuit converts _________

Question # 5

Addition of two octal numbers “36” and “71” results in ________

Question # 6

Above is the circuit diagram of _______.

Question # 7

___________ is one of the examples of synchronous inputs

Question # 8

THE GLITCHES DUE TO RACE CONDITION CAN BE AVOIDED BY USING A ___________

Question # 9

Stack is an acronym for _________

Question # 10

In asynchronous transmission when the transmission line is idle, _________

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Virtual University CS-302 Chapter 1 Important MCQ's

Sr.# Question Answer
1
The output of an XNOR gate is 1 when ____________ . I) All the inputs are zero II) Any of the inputs is zero III) Any of the inputs is one IV) All the inputs are one.
A. I Only
B. IV Only
C. I and IV only
D. II and III only
2 The decimal “17” in BCD will be represented as _________10001(right opt is not given)
A. 11101
B. 11101
C. 10111
D. 11110
3 THE HOURS COUNTER IS IMPLEMENTED USING __________
A. ONLY A SINGLE MOD-12 COUNTER IS REQUIRED
B. MOD-10 AND MOD-6 COUNTERS
C. MOD-10 AND MOD-2 COUNTERS
D. A SINGLE DECADE COUNTER AND A FLIP-FLOP
4 In asynchronous transmission when the transmission line is idle, _________
A. It is set to logic low
B. It is set to logic high
C. Remains in previous state
D. State of transmission line is not used to start transmission
5 Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
A. A parallel to serial converter circuit
B. A counter circuit
C. A BCD to Decimal decoder
D. A 2-to-8 bit decoder
6 In a state diagram, the transition from a current state to the next state is determined by
A. Current state and the inputs
B. Current state and outputs
C. Previous state and inputs
D. Previous state and outputs
7 A transparent mode means _____________.
A. The changes in the data at the inputs of the latch are seen at the output
B. The changes in the data at the inputs of the latch are not seen at the output
C. Propagation Delay is zero (Output is immediately changed when clock signal is applied)
D. Input Hold time is zero (no need to maintain input after clock transition)
8 Excess-8 code assigns _______ to “-8”
A. 1110
B. 1100
C. 1000
D. 0000
9 74HC163 has two enable input pins which are _______ and _________
A. ENP, ENT
B. ENI, ENC
C. ENP, ENC
D. ENT, ENI
10 ___________ is one of the examples of asynchronous inputs.
A. J-K input
B. S-R input
C. D input
D. Clear Input (CLR)

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